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L6920
1V HIGH EFFICIENCY SYNCRONOUS STEP UP CONVERTER
1

Features
0.6 TO 5.5V OPERATING INPUT VOLTAGE 1V START UP INPUT VOLTAGE INTERNAL SYNCHRONOUS RECTIFIER ZERO SHUT DOWN CURRENT 3.3V AND 5V FIXED OR ADJUSTABLE OUTPUT VOLTAGE (2V UP TO 5.2V) 120m INTERNAL ACTIVE SWITCH LOW BATTERY VOLTAGE DETECTION REVERSE BATTERY PROTECTION
Figure 1. Package
TSSOP8
Table 1. Order Codes
Part Number L6920D L6920DTR Package TSSOP8 Tube Tape & Reel
1.1 Applications

2
Description
ONE TO THREE CELL BATTERY DEVICES PDA AND HAND HELD INSTRUMENTS CELLULAR PHONES - DIGITAL CORDLESS PHONE PAGERS GPS DIGITAL CAMERAS
The L6920 is a high efficiency step-up controller requiring only three external components to realize the conversion from the battery voltage to the selected output voltage. The start up is guaranteed at 1V and the device is operating down to 0.6V. Internal synchronous rectifier is implemented with a 120m P-channel MOSFET and, in order to improve the efficiency, a variable frequency control is implemented.
Figure 1. Application Circuit
L1 VCC 2.5V C2
LX
7
8 1
OUT FB C3
VOUT 3.3V 500mA C1
SHDN LBI REF
5 2 4
L6920D
3 6
LBO GND
February 2005
Rev. 2 1/13
L6920
Table 1. Pin Description
Pin 1 2 Name FB LBI Function Output voltage selector. Connect FB to GND for Vout=5V or to OUT for Vout=3.3V. Connect FB to an external resistor divider for adjustable output voltage (from 2V to 5.2V) [see R4 and R5, fig. 7]. Battery low voltage detector input. The internal threshold is set to 1.23V. A resistor divider is needed to adjust the desired low battery threshold: R1 V LBI = 1.23V 1 + ------- [see R1 and R2, fig. 7] R2 3
LBO
Battery low voltage detector output. If the voltage at the LBI pin drops below the internal threshold typ. 1.23V, LBO goes low. The LBO is an open drain output and so a pull-up resistor (about 200K) has to be added for correct output setting [see R3, fig. 7]. 1.23V reference voltage. Bypass this output to GND with a 100nF capacitor for filtering high frequency noise. No capacitor is required for stability device is operating.
4 5 6 7 8
REF
SHDN Shutdown pin. When pin 5 is below 0.2V the device is in shutdown, when pin 5 is above 0.6V the
GND LX OUT Ground pin Step-up inductor connection Power OUTPUT pin
Figure 2. Pin Connection (Top view)
FB LBI LBO REF
1 2 3 4
TSSOP8
8 7 6 5
OUT LX GND SHDN
Table 2. Absolute Maximum Ratings
Symbol Vccmax Vcc to GND LBI, SHDN, FB to GND Vout max Vout to GND Parameter Value 6 6 6 Unit V V V
Table 3. Thermal Data
Symbol Rth j-amb Tj Parameter Thermal Resistance Junction to Ambient Maximum Junction Temperature Value 250 150 Unit C/W C
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L6920
Table 4. Electrical Characteristcs (Vin = 2V, FB = GND, Tamb = -40C to 85C and Tj < 125C unless otherwise specified)
Symbol VCC SECTION Vin Vin Iq Minimum operating Input Voltage Minimum Start Up Input Voltage Quiescent Current Il =0 mA, FB = 1.4V, Vout = 3.3V LBI = SHDN = 2V, Tj = Tamb Il =0 mA, FB = 1.4V, Vout = 5V LBI = SHDN = 2V, Tj = Tamb Isd Irev Shut Down Current Reverse battery current Vin = 5V, Il =0 mA Vin = -4V, Tj = Tamb 9 0.6 1 15 V V A A A A Parameter Test Condition Min. Typ. Max. Unit
11
18
0.1 0.1
1 2
POWER SECTION Ron-N Ron-P Active switch ON resistance Synchronous switch ON resistance 120 120 250 250 m m
CONTROL SECTION Vout Output voltage FB = OUT, Il =0 mA FB = GND, Il =0 mA Output voltage range VLBI LBI threshold 0C < Tj < 70C VLBO Ilim Tonmax Toffmin External divider 3.2 4.9 2 1.18 1.205 1.23 1.23 0.2 0.8 Vout = 2V to 5.3V Vout = 2V to 5.3V 3.75 0.75 1 5 1 3.3 5 3.4 5.1 5.2 1.27 1.255 0.4 1.2 6.25 1.25 0.2 0.6 1.18 1.23 1.27 V V V V V V A s s V V V
LBO logic LOW
LX switch current limit Maximum on time Minimum off time
Isink < 250A
SHDN
SHDN logic LOW SHDN logic HIGH
Vref
Reference Voltage
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L6920
Figure 3. Efficiency vs. Output Current
100
Figure 5. Startup Voltage vs Output Current
1.4
Vin = 2.4V
90
1.2
80
Vin = 1.2V
70 60 50 40 30 20 10 0 0.01 0.1 1 10 100 1000
0 30 60 90 120 150 180
LOAD CURRENT [mA]
1
Startup voltage (V)
EFFICIENCY [%]
0.8
0.6
Vout = 3.3V L = 47H C = 100F
0.4
L = 47H C = 22F
0.2
Figure 4. Efficiency vs. Output Current
100 90
Output current (mA)
Vin = 3.6V
Vin = 2.4V
80
Vin = 1.2V
70 EFFICIENCY [%] 60 50 40 30 20 10 0 0.01 0.1 1 10 100 1000 LOAD CURRENT [mA]
f Vout = 5V L = 47H C = 100F
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L6920
3
Detailed Description
The L6920 is a high efficiency, low voltage step-up DC/DC converter particularly suitable for 1 to 3 cells (Li-Ion/ polymer, NiMH respectively) battery up conversion. These performances are achieved via a strong reduction of quiescent current (10A only) and adopting a synchronous rectification, that implies also a reduced cost in the application (no external diode required). Operation is based on maximum ON time - minimum OFF time control, tailored by a current limit set to 1A. A simplified block diagram is shown here below. Figure 6. Simplified Block Diagram
OUT ZERO CROSSING VREF SHDN FB VOUT GND R1,R2 Y + VBG Q S R + CURRENT LIMIT LBO + VBG Ton max 5sec FB GND Y A B C OPAMP (CR) VOUT LX VIN + VBG + -+
VOUT
A B C
Toff min 1sec
LBI
D99IN1041
4
Principle of Operation
In L6920 the control is based on a comparator that continuously checks the status of output voltage. If the output voltage is lower than the expected value, the control function of the L6920 directs the energy stored in the inductor to be transferred to the load. This is accomplished by alternating between two basic steps: - TON phase: the energy is transferred from the battery to the inductor by shorting LX node to ground via the Nchannel power switch. The switch is turned off if the current flowing in the inductor reaches 1A or after a maximum on time set to 5s. - TOFF phase: the energy stored in the inductor is transferred to the load through the synchronous switch for at least a minimum off time equal to 1s. After this, the synchronous switch is turned off as soon as the output voltage goes lower than the regulated voltage or the current flowing in the inductor goes down to zero. So, in case of light load, the device works in PFM mode, as shown in figures 7 to 10.
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L6920
Figure 7. PFM mode Condition: Vout = 5V; Vin =1.5V. Trace1: Vout (50mV~/div) Trace 4: IL (100mA/div) Time div.: 5s/div Figure 9. Heavy load - Inductor current ripples below Ilim Trace1: Vout (100mV~/div) Trace 4: IL (200mA/div) Time div.: 20 s/div
Figure 8. Heavier load - Train pulses overlapping. Trace1: Vout (100mV~/div) Trace 4: IL (200mA/div) Time div.: 10 s/div
Figure 10. Heavy load and High ESR. Regulation falls in continuous mode of operation. Trace1: Vout (100mV~/div) Trace 4: IL (200mA/div). Time div.: 5 s/div
When Iload is heavier, the pulse trains are overlapped. Figures 7 - 8 show some possible behaviors. Considering that current in the inductor is limited to 1A, the maximum load current is defined by the following relationship: V in V out - V in I load_lim = ---------- I lim - T off min ------------------------- eq. (1) 2L V out Where is the efficiency and Ilim =1A. Of course, if Iload is greater than Iload_lim the regulation is lost (figure 11).
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Figure 11. No regulation. Iload > Iload_lim Trace1: Vout (100mV~/div) Trace 4: IL (200mA/div). Time div.: 5 s/div The synchronous switch body diode causes a parasitic path between power supply and output that can't be avoided also in shutdown. 4.3 Low battery detection The L6920 includes a low battery detector comparator. Threshold is VREF voltage and a 1.3% hysteresis is added to avoid oscillations when input crosses the threshold slowly. The LBO is an open drain output so a pull up resistor is required for a proper use. 4.4 Reverse polarity A protection circuit has been implemented to avoid that L6920 and the battery are destroyed in case of wrong battery insertion. In addition, this circuit has been designed so that the current required by the battery is zero also in reverse polarity.
4.1 Start-up One of the key features of L6920 is the startup at supply voltage down to 1V (please see the diagram in Figure 5. in case of heavy load). The device leaves the startup mode of operation as soon as VOUT goes over 1.4V. During startup, the synchronous switch is off and the energy is transferred to the load through its intrinsic body diode. The N-channel switches with a very low RDSon thanks to an internal charge pump used to bias the power mos gate. Because of this modified behavior, TON/TOFF times are lengthened. Current limit and zero crossing detection are still available. 4.2 Shutdown In shutdown mode (SHDN pulled low) all internal circuitries are turned off, minimizing the current provided by the battery (ISHDN < 100 nA, in typical case). Both switches are turned off, and the low battery comparator output is forced in high impedance state.
5
Application Information
5.1 Output voltage selection Output voltage must be selected acting on FB pin. Three choices are available: fixed 3.3V, 5V or adjustable output set via an external resistor divider. Table 5. Output Voltage Selection
VOUT = 3.3V VOUT = 5V 2V VOUT 5.2V FB pin connected to OUT (see application circuit) FB pin connected to GND FB pin connected to a resistive divider R4 V OUT = 1.23V 1 + ------- R5
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L6920
Figure 12. Demoboard Circuit
Panasonic ELL6RH100M VBATT R1 N.C. R2 N.C. VREF C4 100nF GND LBI 7 2 8 VOUT C3 N.C. C1 47F Panasonic EEFCDJ470R GND LBO 1 2 3 1 2 J2 not mounted components 3 R5 N.C.
D01IN1310
+VBATT
L1 10H C2 47F
+VBATT Panasonic EEFCDJ470R GND VOUT
4
L6920
3
R3 N.C. LBO
6 F.B.
1
5
SHDN J1
SHDN R4 N.C.
Table 6.
Jumper J1 2-3 None J2 1-2 2-3 Device disabled Adjustable using R4 and R5 [not mounted] 3.3V output voltage 5V output voltage Position 1-2 Device enabled Function
R4, R5 should be selected in the range of 100k - 10M to minimize consumption and error due to current sunk by FB pin (few nA). 5.2 Output capacitor selection The output capacitor affects both efficiency and output ripple so its choice has to be considered with particular care. The capacitance value should be in the range of about 10F-100F. An additional, smaller, low ESR capacitor can be in parallel for high frequency filtering. A typical value can be around 1F. If very high performances, in terms of efficiency and output voltage ripple, are required, a very low ESR capacitor has to be chosen. Ceramic capacitors are the lowest ESR but they are very expensive. Other possibilities are low-ESR tantalum capacitors, available from KEMET, AVX and other sources. POSCAP capacitors from SANYO and polymeric capacitors from PANASONIC are also good. Below there is a list of some capacitors suppliers. The cap values and rated voltages are only a suggested possibility
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L6920
Table 7. Capacitors distributors main list
Manufacturer AVX KEMET PANASONIC SANYO POSCAP SPRAGUE Series TPS T510/T494/ T495 EEFCD TPA/B/C 595D Cap Value (F) 15 to 470 10 to 470 22 to 47 22 to 230 100 to 390 Rated Voltage (V) 6.3 6 6.3 6.3 6.3 ESR (m) 50 to 1500 30 to 1000 50 to 700 40 to 80 160 to 700
5.3 Inductor selection Usually, inductors ranging between 5H to 40H satisfy most of the applications. Small value inductors have smaller physical size and guarantee a faster response to load transient but in steady state condition a bigger ripple on output voltage is generated. In fact the output ripple voltage is given by Ipeak multiplied by ESR. Furthermore, as shown in equation (1), inductor size affects also the maximum current deliverable to the load. Lastly, a low series resistance is suggested if very high efficiency values are needed. Anyway, the saturation current of the choke should be higher than the peak current limit of the device (1A). Good surface mounting inductors are available from COILCRAFTS, COILTRONICS, MURATA and other souces. In the following table are listed some suggested components. Table 8. Inductors distributors main list
Manufacturer Coilcraft Series DO1813HC DO1608 Coiltronics UP1B TP3 BI HM76-2 HM76-1 Murata Panasonic LQN6C ELL6SH ELL6RH Sumida CR43 Inductor Value (uH) 22 to 33 4.7 to 15 22 to 33 4.7 to 15 22 to 33 4.7 to 10 10 to 22 10 to 22 5.1 to10 4.7 to 10 Saturation Current (A) 1 to 1.2 0.9 to 1.5 1 to 1.2 0.97 to 1.6 1 to 1.2 1 to 1.5 1.2 to 1.7 0.9 to 1.5 11 to 1.55 0.84 to 1.15
5.4 Layout Guidelines The board layout is very important in order to minimize noise, high frequency resonance problems and electromagnetic interference. It is essential to keep as small as possible the high switching current circulating paths to reduce radiation and resonance problems. So, the output and input cap should be very close to the device. The external resistor dividers, if used, should be as close as possible to the pins of the device (FB and LBI) and as far as possible from the high current circulating paths, to avoid pick up noise. Large traces for high current paths and an extended groundplane, help to reduce the noise and increase the efficiency. For an example of recommended layout see the following evaluation board.
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L6920
Figure 13. Demoboard Components (Top side).
4.5cm
4cm
Figure 14. Demoboard Layout (Top side).
4.5cm
4cm
Figure 15. Demoboard Layout (Bottom side).
4.5cm
4cm
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L6920
6
Package Information
Figure 16. TSSOP8 Mechanical Data & Package Dimensions
mm DIM. MIN. A A1 A2 b c D (1) E 0.050 0.800 0.190 0.090 2.900 6.200 3.000 6.400 4.400 0.650 0.450 0.600 1.000 0 (min.) 8 (max.) 0.100 0.004 0.750 0.018 1.000 TYP. MAX. 1.20 0.150 1.050 0.300 0.200 3.100 6.650 4.500 0.002 0.031 0.007 0.003 0.114 0.244 0.169 0.118 0.252 0.173 0.026 0.024 0.039 0.027 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.008 0.122 0.260 0.177 inch
OUTLINE AND MECHANICAL DATA
E1 (1) 4.300 e L L1 k aaa
Note: 1. D and F does not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch) per side.
TSSOP8 (Body 4.4mm)
0079397 (Jedec MO-153-AA)
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L6920
7
Revision History
Table 9. Revision History
Date May 2003 February 2005 Revision 1 2 First Issue. Modified the max. value of the Isd parameter in the Table 4 pag. 3. Description of Changes
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L6920
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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